Military chips can erase themselves when tampered with

How a Chip Can Detect an Intruder

A field-programmable gate array, or FPGA, is a chip whose internal logic can be rearranged by loading a configuration: a pattern of bits that determines how its circuits behave. In some designs, that configuration is stored in nonvolatile memory, so it remains available after power is removed. That persistence is useful—but it can also leave a valuable design inside a captured device.

An anti-tamper mesh adds a physical alarm around the protected circuitry. It may consist of fine conductive paths layered over or around the chip. Opening the package, cutting into the die, or probing through the mesh can break a path or change an electrical signal. Monitoring circuits look for those changes and treat them as evidence of intrusion.

What “Erasing” Means

If the mesh detects tampering, the chip can trigger a response designed to make the configuration unusable. Depending on the design, that may mean clearing configuration memory, destroying a decryption key, or otherwise disabling access to the stored logic. The goal is not to melt or physically erase the silicon; it is to remove the information an attacker would need to reproduce or analyze the chip’s function.

The response has to be fast and dependable. A detector that notices an intrusion only after an attacker has copied the configuration has failed its purpose. Designers also have to guard against accidental triggers: a mesh sensitive enough to catch probing must still tolerate ordinary operation and handling.

Protection With a Tradeoff

This approach turns the chip’s packaging into part of its security system. It can help protect hardware designs and other sensitive configuration data even when a device is powered down, but it cannot make a chip invulnerable. Its value depends on whether the mesh detects the particular attack and whether the erase mechanism acts before the information is recovered. In a captured device, the decisive moment may be the first cut through a layer of metal—not the later attempt to read the circuitry beneath it.