Why a wafer needs a level surface
A silicon wafer is built up in layers, and each new layer inherits bumps and dips from the one below. Left alone, those ridges would grow more troublesome: later patterns could be harder to focus and align, and narrow features might not form as intended. Polishing between steps resets the surface enough for the next pattern to be made reliably.
Chemistry and motion share the work
In chemical-mechanical polishing, or CMP, the wafer is held in a carrier and pressed against a moving pad. The slurry’s chemistry softens or reacts with the exposed surface; tiny abrasive particles then help remove that material as the pad and wafer move past one another. The pad gives slightly under pressure, while the slurry carries away removed material.
Neither part can do the job alone. Chemical action makes the surface easier to remove, and abrasion supplies controlled mechanical action. Together, they gradually shave down high spots rather than simply sanding the whole wafer by force. Different materials and layer designs call for different polishing conditions, so the process must be tuned to remove the intended material without damaging what lies beneath.
Flat enough for the next layer
“Perfectly flat” is an engineering shorthand, not a claim that every point is identical at every scale. The goal is a surface with sufficiently little height variation across the areas where circuits will be patterned. That practical flatness lets the next manufacturing step begin on a predictable foundation—then the cycle of adding material, patterning it, and polishing it can continue.
